Current Position:
Staff ASIC Engineer at An AI company revolutionizing HPC for neural networksExperience:
36 yearsLocation:
San Diego County, California, United StatesFeb 2022 - Current
Aug 2021 - Jan 2022
Dec 2020 - Jul 2021
Jun 2020 - Nov 2020
Feb 1997 - May 2020
Oct 1989 - Sep 1992
PhD at Institut polytechnique de Grenoble (Grenoble Institute of Technology)
D.E.A at Université Grenoble Alpes
Master of Engineering at Indian Institute of Science
Bachelor of Engineering (Honours) at University of Madras
What is Vijay Raghavan's minimum period of employment in the companies?
Vijay Raghavan's minimum period of employment in various companies is 5 months.What is Vijay Raghavan's average duration of employment for different companies?
On average, Vijay Raghavan works for one company for 5 years 6 monthsWhat industries has Vijay Raghavan worked in?
Vijay Raghavan worked in the Semiconductors, and Computer Software.What positions has Vijay Raghavan held before?
Previously, Vijay Raghavan worked as a Full Chip Power Analysis Engineer, and ASIC/SoC Design Engineer (RTL synthesis for low power), and ASIC Design Engineer (RTL Datapath Synthesis, Static Timing Analysis and Early Power Estimation), and Staff Instructor (ASIC RTL Synthesis / Low Power / Signoff Timing and Power Analysis), and Engineer, Central R&D.How do I contact Vijay Raghavan?
Vijay Raghavan's email address is ****@gmail.com, phone number is +1-870-***-**68. Sign up to get contact details.Who are Vijay Raghavan's peers at other companies?
Vijay Raghavan's peers at other companies are Kevin Stuessy and Zejun Hu and Liangdong TANGFind email for 850M+ professionals