Current Position:
FPGA Design Engineer at ERG, Inc. (@Google X)Experience:
32 yearsLocation:
Santa Clara, California, United StatesMar 2019 - Current
Aug 2010 - Feb 2019
Mar 2007 - Aug 2010
May 1998 - Mar 2007
Aug 1995 - May 1998
Mar 1993 - Jul 1995
MSEE at Michigan State University
BSEE at Beijing University of Posts and Telecommunications
What is Jian Zhang's minimum period of employment in the companies?
Jian Zhang's minimum period of employment in various companies is 2 years 4 months.What is Jian Zhang's average duration of employment for different companies?
On average, Jian Zhang works for one company for 5 years 2 monthsWhat industries has Jian Zhang worked in?
Jian Zhang worked in the Semiconductors, and Computer Software.What positions has Jian Zhang held before?
Previously, Jian Zhang worked as a Sr. Principal Engineer, and Founder, and Principal ASIC Design Engineer, and Sr. FPGA Design Engineer, and ASIC Design Engineer.How do I contact Jian Zhang?
Jian Zhang's email address is **@gmail.com, phone number is +1-909-***-**49. Sign up to get contact details.Who are Jian Zhang's peers at other companies?
Jian Zhang's peers at other companies are Nicholas Joukhdar and Bradley McClinton and Jian LuFind email for 850M+ professionals