DDeep Patel's
email & phone
Current Position:
Senior ASIC Design Engineer at NVIDIAExperience:
7 yearsLocation:
Brick, New Jersey, United StatesHow to contact Deep Patel
p*****d@nvidia.com
+1-623-***-**75
Work Experience
Senior ASIC Design Engineer at
NVIDIA
Jan 2024 - Current
Wireless ASIC/FPGA Design Engineer at
Qualcomm
Aug 2021 - Feb 2024
FPGA Design Engineer at
Boeing
Aug 2018 - Aug 2021
According to LinkedIn Deep Patel started working on 2018, then the employee has changed 2 companies and 2 jobs. On average, Deep Patel works for one company for 2 years 5 months.
Education
Bachelor of Science - BS at Rutgers University–New Brunswick
Frequently Asked Questions
What is Deep Patel's minimum period of employment in the companies?
Deep Patel's minimum period of employment in various companies is 2 years 6 months.What is Deep Patel's average duration of employment for different companies?
On average, Deep Patel works for one company for 2 years 9 monthsWhat industries has Deep Patel worked in?
Deep Patel works in the Computer Hardware. Previously, Deep Patel worked in the Telecommunications, and Aviation & Aerospace.What positions has Deep Patel held before?
Previously, Deep Patel worked as a Wireless ASIC/FPGA Design Engineer, and FPGA Design Engineer.How do I contact Deep Patel?
Deep Patel's email address is p*****d@nvidia.com, phone number is +1-623-***-**75. Sign up to get contact details.Who is the President & CEO of the NVIDIA?
The President & CEO of the NVIDIA is Jensen HuangWho are Deep Patel's peers at other companies?
Deep Patel's peers at other companies are Regil Yana and Prabu Chidambaram and Marihan AmeinNot the Deep Patel you were looking for?
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