A

Akash Dixit's
email & phone

Current Position:

Sr. Design lead at Tessolve

Experience:

13 years

Location:

Bengaluru, Karnataka, India

How to contact Akash Dixit

email**@tessolve.com
phone+91-***-***-2535
LinkedIn
Skype

Work Experience

Sr. Design lead at Tessolve

Dec 2021 - Current

Analog mixed signal layout engineer at Altran

Apr 2018 - May 2022

Analog layout design engineer at Cadence

Sep 2015 - Mar 2018

Junior layout Engineer at LSI, an Avago Technologies Company

Jan 2013 - Sep 2015

Project Trainee at LSI Corporation Pvt Ltd

Jun 2012 - Dec 2012

Education

64 at JNCT, Bhopal

Higher secondary at High Secondary from M.P Board Bhopal (2005)

10th at M.P Board

Frequently Asked Questions

What is Akash Dixit's minimum period of employment in the companies?

Akash Dixit's minimum period of employment in various companies is 6 months.

What is Akash Dixit's average duration of employment for different companies?

On average, Akash Dixit works for one company for 2 years 5 months

What industries has Akash Dixit worked in?

Akash Dixit works in the Semiconductors. Previously, Akash Dixit worked in the Information Technology and Services, and Computer Software.

What positions has Akash Dixit held before?

Previously, Akash Dixit worked as a Analog mixed signal layout engineer, and Analog layout design engineer, and Junior layout Engineer, and Project Trainee.

How do I contact Akash Dixit?

Akash Dixit's email address is **@tessolve.com, phone number is +91-***-***-2535. Sign up to get contact details.

Who is the Co-Founder & CEO of the Tessolve?

The Co-Founder & CEO of the Tessolve is Srinivas Chinamilli
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Akash Dixit Namesakes

Name
Company
Position
A
Asst. Account Manager
A
Relationship Officer
A
Assistant Manager - Business Development
A
Operational Risk Manager
A
Quality Assurance Tester

Other employees at Tessolve

Name
Company
Position
B
Sr. Design Lead
S
Physical Design Engineer
R
Senior Systems Software Engineer (Hardware)
G
Design Engineer
J
Senior Quality Engineer
G
Sr. silicon validation engineer 2
S
Senior Lead Signal Integrity Engineer
P
Sr. Silicon Validation Engineer 1
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