YIP SAI WEI

YIP SAI WEI: Email & Phone Number

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DFT Validation Engineer at Intel|Puchong, Selangor, Malaysia

Position:

DFT Validation Engineer at Intel

Location:

Puchong, Selangor, Malaysia

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Last updated: 2026-06-20
Updated: 2026-06-20

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Work Experience 4 years

DFT Validation Engineer at Intel

May 2022 - Current

Graduate Trainee at Intel

Mar 2022 - May 2022

Internship Trainee at Intel

Jan 2022 - Mar 2022

YIP SAI WEI started working in 2022, then the employee has changed 2 jobs. On average, YIP SAI WEI works for one company for 1 year 6 months.

YIP is proficient in Chinese, English, and Japanese. Their professional focus is IJTAG, Joint Test Action Group (JTAG), and SystemVerilog across 3 core areas.

YIP holds Tessent Scan and ATPG - v22.16, UPF Power Aware Design & Verification, and Tessent IJTAG - v22.16 certifications.

Education

Bachelor of Science (Honours) in Microelectronics (Embedded Technology) at Tunku Abdul Rahman University College (TARC)

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