Yee Sing Tan

Yee Sing Tan's email & phone

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FPGA IP Design Verification Engineer at Intel|Penang, Malaysia

Position:

FPGA IP Design Verification Engineer at Intel

Location:

Penang, Malaysia

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Last updated: 2023-03-27
Updated: 2023-03-27

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Work Experience 19 years

FPGA IP Design Verification Engineer at Intel

Jul 2019 - Current

SoC Pre-silicon Validation Engineer at Intel

Apr 2014 - Jun 2019

Component Design Engineer at Intel

Jun 2007 - Mar 2014

Yee Sing Tan started working in 2007, then the employee has changed 2 jobs. On average, Yee Sing Tan works for one company for 6 years 3 months.

Frequently Asked Questions

What is Yee Sing Tan's minimum period of employment in the companies?

Yee Sing Tan's minimum period of employment in various companies is 5 years 2 months.

What is Yee Sing Tan's average duration of employment for different companies?

On average, Yee Sing Tan works for one company for 6 years

What industries has Yee Sing Tan worked in?

Yee Sing Tan works in the Semiconductors.

What positions has Yee Sing Tan held before?

Previously, Yee Sing Tan worked as a SoC Pre-silicon Validation Engineer, and Component Design Engineer.

How do I contact Yee Sing Tan?

Yee Sing Tan's phone number is +60-***-***-6734. Sign up to get contact details.

Who is the CEO of the Intel?

The CEO of the Intel is Patrick P. Gelsinger

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