yahchen chew: Email & Phone Number

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Design Verification Engineering Manager at Intel|Penang, Malaysia

Position:

Design Verification Engineering Manager at Intel

Location:

Penang, Malaysia

View yahchen chew's Email

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Last updated: 2026-04-28

Updated: 2026-04-28

Found email addresses for yahchen chew:

Business emails:

c*********n@intel.com

Found phone for yahchen chew:

+60-***-***-9640

A different yahchen chew?

Work Experience 20 years

Design Verification Engineering Manager at Intel

Jan 2021 - Current

Staff Design Verification Engineer at Intel

Jan 2011 - Jan 2021

Product Development Engineer at Intel

Jan 2010 - Jan 2011

Component Design Engineer at Intel

Jun 2006 - Jan 2010

yahchen chew started working in 2006, then the employee has changed 3 jobs. On average, yahchen chew works for one company for 5 years.

Their professional focus is Coaching, Collaborative Problem Solving, and Communication across 3 core areas.

Education

Bachelor's degree at University of Technology, Malaysia

Frequently Asked Questions

What is yahchen chew's email address?

SignalHire found a verified business email address for yahchen chew: c*********n@intel.com.

What is yahchen chew's phone number?

SignalHire found a verified phone number for yahchen chew: +60-***-***-9640.

How do I contact yahchen chew at Intel?

You can reach yahchen chew through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is yahchen chew's professional background?

yahchen chew has 20 years of professional experience. They have held roles including Staff Design Verification Engineer, Product Development Engineer, and Component Design Engineer at companies such as Intel, Intel, and Intel. Their education includes Bachelor's degree from University of Technology, Malaysia.

Is yahchen chew's contact information up to date?

Yes. yahchen chew's SignalHire profile was last updated on 28 April 2026, reflecting their current position as Design Verification Engineering Manager at Intel in Santa Clara, California, United States.

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