Thomas Bozic

Thomas Bozic: Email & Phone Number

Opt-Out
FPGA I/O Architect, Senior Principal Engineer at Altera|Fort Collins, Colorado, United States

Position:

FPGA I/O Architect, Senior Principal Engineer at Altera

Location:

Fort Collins, Colorado, United States

LinkedIn
View Thomas Bozic's Email
Up to 10 free lookups. No credit card required.
Last updated: 2026-06-19
Updated: 2026-06-19

Found email addresses for Thomas Bozic:

Business emails:

Found phone for Thomas Bozic:

Searching for Thomas Bozic profiles
0% completed

A different Thomas Bozic?

Sign up to search for other Thomas Bozic's across our 850M+ professionals database

Work Experience 25 years

FPGA I/O Architect, Senior Principal Engineer at Altera

May 2026 - Current

Chief Analog Debug Engineer, Principal Engineer at Altera

Feb 2025 - May 2026

Senior Analog Design Engineer at Intel

Jan 2018 - Feb 2025

Lead SerDes Behavioral Model (BMOD) Designer at Intel

Oct 2014 - Dec 2017

Lead Analog Mixed-Signal (AMS) Design Engineer at Intel

Apr 2009 - Sep 2014

Physical Design Engineer at Intel

Jan 2005 - Mar 2009

VLSI Design Intern at Hewlett Packard Enterprise

Apr 2001 - Dec 2005

Thomas Bozic started working in 2001, then the employee has changed 2 companies and 6 jobs. On average, Thomas Bozic works for one company for 3 years 8 months.

Their professional focus is 10G Ethernet, AMS, and Analog across 3 core areas.

Education

Bachelor of Engineering at University of Colorado Boulder

Master of Engineering at University of Colorado Boulder

Thomas Bozic Namesakes

Name
Company
Position
Thomas
Virtual Desktop Infrastructure (VDI) Administrator
Get contacts
Thomas
Software Developer
Get contacts
Thomas
JEBCO Construction Companies
Construction Estimator
Get contacts
See more profiles

Other employees at Altera

Name
Company
Position
Fong Jia Shern
FPGA Silicon Design Engineer
Get contacts
Swathi Prakash
Senior DFT Engineer
Get contacts
Christina Medina
Executive Assistant to Chief Revenue Officer
Get contacts
Tim Whiting
FAE
Get contacts
Shanmugavisal
Post Silicon Validation Engineer (ACE)
Get contacts
Yiyang Teoh
Engineer (Analog IC Design)
Get contacts
Ming Kai Teoh
Content Development Engineer
Get contacts
KANISHKA
FPGA IP Software Development Design and Verification Engineer
Get contacts
Sachin Sakthivel
Firmware Engineer
Get contacts
Rohayah Mohd Radzi
Global Payroll Lead
Get contacts
See more profiles

Data Privacy

GDPR Icon

GDPR COMPLIANT

SignalHire complies with the General Data Protection Regulation (GDPR). SignalHire follows GDPR requirements, including but not limited to rights of data subjects to access, correct, or delete their personal information and supports the right to be forgotten.

CCPA Icon

CCPA COMPLIANT

SignalHire is CCPA-compliant and provides California residents the right to know, access, opt out, and request deletion of their personal data.

BACK TO TOP