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Hari Loya's
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Current Position:

R&D Engineering, Staff Engineer at Synopsys Inc

Experience:

11 years

Location:

Hyderabad, Telangana

How to contact Hari Loya

Last updated:2025-08-29
emailh******a@synopsys.com
phone+91-***-***-4545
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Analytics

According to LinkedIn Hari Loya started working on 2014, then the employee has changed 7 companies and 5 jobs. On average, Hari Loya works for one company for 1 year 2 months. Hari Loya has been working as a R&D Engineering, Staff Engineer for Synopsys Inc for 1735 days. If you are interested in this candidate, contact him directly by using contact details provided by SignalHire.

Work Experience

R&D Engineering, Staff Engineer at Synopsys Inc

Dec 2020 - Current

Physical Design Engineer at AMD

Dec 2019 - Dec 2020

Physical Design Engineer at Intel Corporation

Jun 2019 - Nov 2019

Physical Design Engineer at Intel Corporation

Feb 2018 - May 2019

BackEnd Design Enginner at Western Digital

Sep 2017 - Feb 2018

Analog Layout Design Engineer at STMicroelectronics

Jan 2017 - Aug 2017

Physical Design Engineer at ADEPT CHIP SERVICES PRIVATE LIMITED

Jan 2016 - Jan 2017

Memeory Layout Design Engineer 70nm at Texas Instruments

Mar 2015 - Dec 2015

VLSI Industrial training at Semicon labs

Aug 2014 - Feb 2015

Education

Master of Technology (MTech) at Koneru Lakshmaiah College of Engineering

Bachelor of Technology (B.Tech.) at D.M.S Sri venkateswara Hindu college

Current Company Information Synopsys Inc

Name: Synopsys Inc

Speciality: EDA, Computer Software, Semiconductor IP, Software Quality, Software Security

Location: Sunnyvale, California, United States

Employees: 10000+

Description: Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP,...

Skills

Cadence Software, ModelSim, IC, Place & Route, PNR, Cadence Encounter, VLSI, High Speed Design, Physical Design, Methodology, Digital Layout, Analog Layout, C++, Cadence Virtuoso Layout Editor, Unified Power Format (UPF), Verilog, Xilinx ISE, Presentation Skills, DRC, LVS, Cadence Virtuoso, Electronics, Floorplanning, Physical Verification, C, Debugging, Solution-oriented, Analog Circuit Design, Design Flow, Microsoft Office, Very-Large-Scale Integration (VLSI), Integrated Circuit Design, Questa Sim, VHDL, Timing

Frequently Asked Questions

How long has Hari Loya been working as a R&D Engineering, Staff Engineer?

Hari Loya's total experience in various companies as a R&D Engineering, Staff Engineer 4 years 9 months.

What is Hari Loya's minimum period of employment in the companies?

Hari Loya's minimum period of employment in various companies is 5 months.

What is Hari Loya's average duration of employment for different companies?

On average, Hari Loya works for one company for 9 months

What industries has Hari Loya worked in?

Hari Loya works in the Computer Software. Previously, Hari Loya worked in the Semiconductors, and Computer Hardware.

What positions has Hari Loya held before?

Previously, Hari Loya worked as a Physical Design Engineer, and BackEnd Design Enginner, and Analog Layout Design Engineer, and Memeory Layout Design Engineer 70nm, and VLSI Industrial training.

How do I contact Hari Loya?

Hari Loya's email address is h******a@synopsys.com, phone number is +91-***-***-4545. Sign up to get contact details.

Who is the Co-CEO of the Synopsys Inc?

The Co-CEO of the Synopsys Inc is Aart de Geus

Who are Hari Loya's peers at other companies?

Hari Loya's peers at other companies are John Joy Arikkat and Rohit Dasu and suneetha Jami
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