Samith Sasikumar: Email & Phone Number

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Lead SoC/RTL Design Engineer at Cadence|Austin, Texas, United States

Position:

Lead SoC/RTL Design Engineer at Cadence

Location:

Austin, Texas, United States

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Last updated: 2026-08-10

Updated: 2026-08-10

Found email addresses for Samith Sasikumar:

Business emails:

s********r@cadence.com,

s****h@cadence.com

Personal emails:

s******5@gmail.com

Found phones for Samith Sasikumar:

+1-323-***-**33,

+1-623-***-**36,

+1-520-***-**52

A different Samith Sasikumar?

Work Experience 9 years

Lead SoC/RTL Design Engineer at Cadence

Feb 2024 - Current

RTL Design Engineer at Tata Elxsi

Oct 2017 - Dec 2021

Their professional focus is AMBA, Application-Specific Integrated Circuits (ASIC), and C (Programming Language) across 3 core areas.

Education

Master's degree at Arizona State University

Amrita School of Engineering

Frequently Asked Questions

What is Samith Sasikumar's email address?

SignalHire found verified email addresses for Samith Sasikumar, both business and personal. Their business email is s********r@cadence.com, and personal emails include s******5@gmail.com.

What is Samith Sasikumar's phone number?

SignalHire found multiple verified phone numbers for Samith Sasikumar: +1-323-***-**33, +1-623-***-**36, and +1-520-***-**52.

How do I contact Samith Sasikumar at Cadence?

You can reach Samith Sasikumar through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is Samith Sasikumar's professional background?

Samith Sasikumar has 9 years of professional experience. They have held roles including RTL Design Engineer at companies such as Tata Elxsi. Their education includes Master's degree from Arizona State University, and Amrita School of Engineering.

Is Samith Sasikumar's contact information up to date?

Yes. Samith Sasikumar's SignalHire profile was last updated on 10 August 2026, reflecting their current position as Lead SoC/RTL Design Engineer at Cadence in San Jose, California, United States.

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