Ryan: Email & Phone Number

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ASIC Design Engineering Director at Astera Labs|Austin, Texas Metropolitan Area, United States

Position:

ASIC Design Engineering Director at Astera Labs

Location:

Austin, Texas Metropolitan Area, United States

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Last updated: 2026-10-08

Updated: 2026-10-08

Found email addresses for Ryan:

Business emails:

_***n@asteralabs.com

Personal emails:

r***@broadcom.com,

****@asteralabs.com,

r***@aol.com,

****@gmail.com

Found phones for Ryan:

+1-909-***-**00,

+1-480-***-**40

A different Ryan?

Work Experience 24 years

ASIC Design Engineering Director at Astera Labs

Jan 2026 - Current

ASIC Design Engineering Senior Manager at Astera Labs

May 2023 - Dec 2025

Staff ASIC Engineer at Broadcom

Jan 2021 - Apr 2023

Staff SoC Design Engineer at Marvell Technology

Aug 2015 - Dec 2020

Senior SoC Design Engineer at Marvell Technology

Jun 2011 - Jul 2015

ASIC Design Engineer at Atheros Communications

Jun 2006 - May 2011

ASIC Design Engineer at Ikanos Communications

Jul 2002 - May 2006

Ryan started working in 2002, then the employee has changed 4 companies and 5 jobs. On average, Ryan works for one company for 3 years 5 months.

Ryan is proficient in English.

Education

M.S. at University of California, Los Angeles - School of Law

Frequently Asked Questions

What is Ryan's email address?

SignalHire found verified email addresses for Ryan, both business and personal. Their business email is _***n@asteralabs.com, and personal emails include r***@broadcom.com, ****@asteralabs.com, and r***@aol.com.

What is Ryan's phone number?

SignalHire found multiple verified phone numbers for Ryan: +1-909-***-**00, and +1-480-***-**40.

How do I contact Ryan at Astera Labs?

You can reach Ryan through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is Ryan's professional background?

Ryan has 24 years of professional experience. They have held roles including ASIC Design Engineering Senior Manager, Staff ASIC Engineer, and Staff SoC Design Engineer at companies such as Astera Labs, Broadcom, and Marvell Technology. Their education includes M.S. from University of California, Los Angeles - School of Law.

Is Ryan's contact information up to date?

Yes. Ryan's SignalHire profile was last updated on 8 October 2026, reflecting their current position as ASIC Design Engineering Director at Astera Labs in San Jose, CA, United States.

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