Reesa Jin

Reesa Jin: Email & Phone Number

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Platform Design Validation Engineer at Intel|Minhang District, Shanghai, China

Position:

Platform Design Validation Engineer at Intel

Location:

Minhang District, Shanghai, China

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Last updated: 2025-10-07
Updated: 2025-10-07

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Work Experience 23 years

Platform Design Validation Engineer at Intel

May 2015 - Current

Sr. Design Validation Engineer at ADLINK Technology

Aug 2011 - Apr 2015

Notebook Electrical design validation test duputy director at Tech-Front (shanghai) Computer., Ltd

Jul 2003 - Jul 2011

Reesa Jin started working in 2003, then the employee has changed 2 companies and 2 jobs. On average, Reesa Jin works for one company for 7 years 7 months.

Their professional focus is 奢侈品, 培训, and 领导力 across 3 core areas.

Education

BS at Shanghai University

Bachelor of Science (B.S.) at Shanghai University

Frequently Asked Questions

What is Reesa Jin's email address?

SignalHire found a verified business email address for Reesa Jin: j******a@intel.com.

What is Reesa Jin's phone number?

SignalHire found a verified phone number for Reesa Jin: +86-***-***-5392.

How do I contact Reesa Jin at Intel?

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What is Reesa Jin's professional background?

Reesa Jin has 23 years of professional experience. They have held roles including Sr. Design Validation Engineer, and Notebook Electrical design validation test duputy director at companies such as ADLINK Technology, and Tech-Front (shanghai) Computer., Ltd. Their education includes BS from Shanghai University, and Bachelor of Science (B.S.) from Shanghai University.

Is Reesa Jin's contact information up to date?

Yes. Reesa Jin's SignalHire profile was last updated on 7 October 2025, reflecting their current position as Platform Design Validation Engineer at Intel in Santa Clara, California, United States.

Reesa Jin Namesakes

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Reesa Jin
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