Ping Gao: Email & Phone Number

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Senior Component Design Engineer at Intel|Chandler, Arizona, United States

Position:

Senior Component Design Engineer at Intel

Location:

Chandler, Arizona, United States

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Last updated: 2026-06-13

Updated: 2026-06-13

Found email addresses for Ping Gao:

Business emails:

p******o@intel.com,

p*****o@tencent.com

Personal emails:

e******g@gmail.com

Found phones for Ping Gao:

+1-909-***-**33,

+1-520-***-**73,

+1-205-***-**36,

+1-909-***-**24

A different Ping Gao?

Work Experience 26 years

Senior Component Design Engineer at Intel

Aug 2006 - Current

Component Design Engineer at Intel

Jul 2000 - Jul 2006

Ping Gao started working in 2000, then the employee has changed 1 company and 1 job. On average, Ping Gao works for one company for 13 years.

Their professional focus is Application-Specific Integrated Circuits (ASIC), Function Verification, and OVM across 3 core areas.

Education

Master of Science in Technology at Arizona State University

Frequently Asked Questions

What is Ping Gao's email address?

SignalHire found verified email addresses for Ping Gao, both business and personal. Their business email is p******o@intel.com, and personal emails include e******g@gmail.com.

What is Ping Gao's phone number?

SignalHire found multiple verified phone numbers for Ping Gao: +1-909-***-**33, +1-520-***-**73, and +1-205-***-**36.

How do I contact Ping Gao at Intel?

You can reach Ping Gao through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is Ping Gao's professional background?

Ping Gao has 26 years of professional experience. They have held roles including Component Design Engineer at companies such as Intel . Their education includes Master of Science in Technology from Arizona State University.

Is Ping Gao's contact information up to date?

Yes. Ping Gao's SignalHire profile was last updated on 13 June 2026, reflecting their current position as Senior Component Design Engineer at Intel in Santa Clara, California, United States.

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