Kavya Aenuga

Kavya Aenuga: Email & Phone Number

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CPU Verification Engineer at MIPS|Bengaluru, Karnataka, India

Position:

CPU Verification Engineer at MIPS

Location:

Bengaluru, Karnataka, India

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Last updated: 2024-08-07
Updated: 2024-08-07

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Work Experience 6 years

CPU Verification Engineer at MIPS

Apr 2024 - Current

Semiconductor Validation Engineer at Intel

Jun 2021 - Jun 2023

Research Assistant at San José State University

May 2020 - Jun 2021

Instructional Student Assistant at San José State University

Feb 2020 - May 2020

Kavya Aenuga started working in 2020, then the employee has changed 2 companies and 3 jobs. On average, Kavya Aenuga works for one company for 1 year 4 months.

Their professional focus is C (Programming Language), Intel Quartus Prime, and Linux across 3 core areas.

Education

Master's degree at San Jose State University

Bachelor of Engineering - BE at BNM Institute Of Technology

Frequently Asked Questions

What is Kavya Aenuga's email address?

SignalHire found a verified business email address for Kavya Aenuga: a******k@mips.com.

What is Kavya Aenuga's phone number?

SignalHire found a verified phone number for Kavya Aenuga: +91-***-***-4936.

How do I contact Kavya Aenuga at MIPS?

You can reach Kavya Aenuga through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is Kavya Aenuga's professional background?

Kavya Aenuga has 6 years of professional experience. They have held roles including Semiconductor Validation Engineer, Research Assistant, and Instructional Student Assistant at companies such as Intel, San José State University, and San José State University. Their education includes Master's degree from San Jose State University, and Bachelor of Engineering - BE from BNM Institute Of Technology.

Is Kavya Aenuga's contact information up to date?

Yes. Kavya Aenuga's SignalHire profile was last updated on 7 August 2024, reflecting their current position as CPU Verification Engineer at MIPS in San Jose, California, United States.

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