Junior APARA

Junior APARA: Email & Phone Number

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Senior FPGA Engineer at NVIDIA|United States

Position:

Senior FPGA Engineer at NVIDIA

Location:

United States

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Last updated: 2026-07-10
Updated: 2026-07-10

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Work Experience 22 years

Senior FPGA Engineer at NVIDIA

Jan 2024 - Current

Principal Staff FPGA Engineer at Motorola Solutions

Jan 2017 - Jan 2023

Senior Digital Design Engineer at Intel

Jan 2013 - Jan 2016

Senior Digital Design Engineer at Microsemi Corporation

Jan 2010 - Jan 2012

Digital Design Engineer at Microsemi Corporation

Jan 2007 - Jan 2009

SoC Design Engineer at Altera

Jan 2004 - Jan 2006

Junior APARA started working in 2004, then the employee has changed 4 companies and 4 jobs. On average, Junior APARA works for one company for 2 years 11 months.

Their professional focus is Cross-department collaboration, Data acquisition and processing, and Environmental adaptability testing across 3 core areas.

Education

Master of Science - MS at Georgia Institute of Technology

Bachelor of Science - BS at University of Minnesota

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