Jun Tatt Boon: Email & Phone Number

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Design Verification Engineer at Lattice Semiconductor|Penang, Malaysia

Position:

Design Verification Engineer at Lattice Semiconductor

Location:

Penang, Malaysia

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Last updated: 2026-06-24

Updated: 2026-06-24

Found email addresses for Jun Tatt Boon:

Business emails:

*u*@hhart.com,

j***n@latticesemi.com,

j***n@indianaasasoftball.org

Found phone for Jun Tatt Boon:

+60-***-***-6243

A different Jun Tatt Boon?

Work Experience 16 years

Design Verification Engineer at Lattice Semiconductor

Nov 2023 - Current

SoC DFx Verification Lead at Intel

Aug 2017 - Oct 2023

SoC DFx Verification Domain Lead at Intel

Mar 2018 - Jun 2021

SoC DFx Lead (Chipset) at Intel

Jun 2018 - Nov 2020

SoC Pre-silicon Validation Engineer at Intel

Jul 2016 - Aug 2017

IP Pre-silicon Validation Engineer at Intel

Jul 2011 - Jul 2016

Intern Trainee at Microchip

May 2010 - Jul 2010

Jun Tatt Boon started working in 2010, then the employee has changed 2 companies and 6 jobs. On average, Jun Tatt Boon works for one company for 3 years.

Their professional focus is AMBA, Computer Repair, and Debugging across 3 core areas.

Jun holds PCI and PCI Express Technologies and CompTIA Network+ certifications.

Education

Bachelor of Engineering (Hons.) at Universiti Malaysia Sarawak

St. George's Institution (SGI)

Frequently Asked Questions

What is Jun Tatt Boon's email address?

SignalHire found a verified business email address for Jun Tatt Boon: *u*@hhart.com, j***n@latticesemi.com, j***n@indianaasasoftball.org.

What is Jun Tatt Boon's phone number?

SignalHire found a verified phone number for Jun Tatt Boon: +60-***-***-6243.

How do I contact Jun Tatt Boon at Lattice Semiconductor?

You can reach Jun Tatt Boon through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is Jun Tatt Boon's professional background?

Jun Tatt Boon has 16 years of professional experience. They have held roles including SoC DFx Verification Lead, SoC DFx Verification Domain Lead, and SoC DFx Lead (Chipset) at companies such as Intel, Intel, and Intel. Their education includes Bachelor of Engineering (Hons.) from Universiti Malaysia Sarawak, and St. George's Institution (SGI).

Is Jun Tatt Boon's contact information up to date?

Yes. Jun Tatt Boon's SignalHire profile was last updated on 24 June 2026, reflecting their current position as Design Verification Engineer at Lattice Semiconductor in Hillsboro, Oregon, United States.

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