jay reddy: Email & Phone Number

Design and Verification of FIFic at Design and Verification of FIFic using System Verilog and UVM|Bengaluru, Karnataka, India

Position:

Design and Verification of FIFic at Design and Verification of FIFic using System Verilog and UVM

Location:

Bengaluru, Karnataka, India

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Last updated: 2026-03-02

Updated: 2026-03-02

Found email addresses for jay reddy:

Business emails:

****@gmail.com

Found phone for jay reddy:

+91-***-***-7045

A different jay reddy?

Work Experience

Design and Verification of FIFic at Design and Verification of FIFic using System Verilog and UVM

Components Generator, BFM, interface, monitor, coverage, scoreboard that improved reusability of tes at SV test bench

- Current

Design and Verification of Memory model using System Verilog at Design and Verification of Memory model using System Verilog

- Current

Development & Verification for AXI3.0 protocol at UVC

- Current

VLSI Design and Verification Intern at VLSI Design and Verification

- Current

Design & Verification using Verilog at All Controller

- Current

Design & Verification using Verilog at Interrupt Controller

- Current

Design Verification Engineer at Lemniscale Technologies

Jul 2023 - Current

jay reddy started working in 2023, then the employee has changed 7 companies and 6 jobs. On average, jay reddy works for one company for 3 years 1 month.

Their professional focus is Agent Development, APB, and AXI across 3 core areas.

Education

B.Tech at Annamacharya Institute of Technology and Sciences

Intermediate at Krishna Chaithaya junior College

SSC at Sri netaji MSR pilot high school

Frequently Asked Questions

What is jay reddy's email address?

SignalHire found a verified business email address for jay reddy: ****@gmail.com.

What is jay reddy's phone number?

SignalHire found a verified phone number for jay reddy: +91-***-***-7045.

How do I contact jay reddy at Design and Verification of FIFic using System Verilog and UVM?

You can reach jay reddy through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is jay reddy's professional background?

They have held roles including Components Generator, BFM, interface, monitor, coverage, scoreboard that improved reusability of tes, Design and Verification of Memory model using System Verilog, and Development & Verification for AXI3.0 protocol at companies such as SV test bench, Design and Verification of Memory model using System Verilog, and UVC. Their education includes B.Tech from Annamacharya Institute of Technology and Sciences, and Intermediate from Krishna Chaithaya junior College.

Is jay reddy's contact information up to date?

Yes. jay reddy's SignalHire profile was last updated on 2 March 2026, reflecting their current position as Design and Verification of FIFic at Design and Verification of FIFic using System Verilog and UVM.

jay reddy Namesakes

Name

Company

Position

Jay Reddy

Saggi Solutions

Business Development/Client Relationship Manager-IT Recruitment

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Jay Reddy

MasterTech Web Applications

Full Stack Developer

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Jay Reddy

Humana

Data Engineer

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