Jared Reiss

Jared Reiss's email & phone

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SoC Design Verification Engineer at Intel|Fort Collins, Colorado, United States

Position:

SoC Design Verification Engineer at Intel

Location:

Fort Collins, Colorado, United States

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Last updated: 2026-05-04
Updated: 2026-05-04

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Work Experience 3 years

SoC Design Verification Engineer at Intel

Oct 2025 - Current

Associate Embedded Hardware Engineer at Extreme Engineering Solutions

Jan 2024 - Aug 2024

Electrical Hardware PV&V and Design at John Deere

May 2023 - Aug 2023

Education

Bachelor of Science - BS at University of Wisconsin-Madison

Frequently Asked Questions

What is Jared Reiss's minimum period of employment in the companies?

Jared Reiss's minimum period of employment in various companies is 3 months.

What is Jared Reiss's average duration of employment for different companies?

On average, Jared Reiss works for one company for 5 months

What industries has Jared Reiss worked in?

Jared Reiss works in the Semiconductors. Previously, Jared Reiss worked in the Computer Hardware, and Machinery.

What positions has Jared Reiss held before?

Previously, Jared Reiss worked as a Associate Embedded Hardware Engineer, and Electrical Hardware PV&V and Design.

How do I contact Jared Reiss?

Jared Reiss's phone number is +1-***-***-5940. Sign up to get contact details.

Who is the CEO of the Intel?

The CEO of the Intel is Patrick P. Gelsinger

Who are Jared Reiss's peers at other companies?

Jared Reiss's peers at other companies are Majd Khoury and Ashish Hebbar and Ruchitha Srinivas

Jared Reiss Namesakes

Name
Company
Position
Jared Reiss
Reiss Cubed
Founder and COO

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