Current Position:
Staff ASIC/FPGA Engineer at Synopsys IncExperience:
5 yearsLocation:
Sunnyvale, CaliforniaFeb 2025 - Current
Jan 2023 - Feb 2025
May 2021 - Jan 2023
Jun 2020 - Dec 2020
Master of Science - MS at Northwestern University
Bachelor's degree at Harbin Institute of Technology
none at UC Berkeley Extension
Name: Synopsys Inc
Speciality: EDA, Computer Software, Semiconductor IP, Software Quality, Software Security
Location: Sunnyvale, California, United States
Employees: 10000+
Description: Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP,...
How long has Haoxuan Peter been working as a Staff ASIC/FPGA Engineer?
Haoxuan Peter's total experience in various companies as a Staff ASIC/FPGA Engineer 6 months.What is Haoxuan Peter's minimum period of employment in the companies?
Haoxuan Peter's minimum period of employment in various companies is 6 months.What is Haoxuan Peter's average duration of employment for different companies?
On average, Haoxuan Peter works for one company for 1 year 5 monthsWhat industries has Haoxuan Peter worked in?
Haoxuan Peter works in the Computer Software. Previously, Haoxuan Peter worked in the Semiconductors.What positions has Haoxuan Peter held before?
Previously, Haoxuan Peter worked as a ASIC Digital Design Engineer, and FPGA Validation Engineer, and Graduate Technical Intern.How do I contact Haoxuan Peter?
Haoxuan Peter's email address is h**********r@synopsys.com, phone number is +1-***-***-3651. Sign up to get contact details.Who is the Co-CEO of the Synopsys Inc?
The Co-CEO of the Synopsys Inc is Aart de GeusFind email for 850M+ professionals