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Haoxuan Peter's
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Current Position:

Staff ASIC/FPGA Engineer at Synopsys Inc

Experience:

5 years

Location:

Sunnyvale, California

How to contact Haoxuan Peter

Last updated:2025-08-04
emailh**********r@synopsys.com
phone+1-***-***-3651
LinkedIn
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Analytics

According to LinkedIn Haoxuan Peter started working on 2020, then the employee has changed 1 company and 3 jobs. On average, Haoxuan Peter works for one company for 1 year 2 months. Haoxuan Peter has been working as a Staff ASIC/FPGA Engineer for Synopsys Inc for 181 days. If you are interested in this candidate, contact him directly by using contact details provided by SignalHire.

Work Experience

Staff ASIC/FPGA Engineer at Synopsys Inc

Feb 2025 - Current

ASIC Digital Design Engineer at Synopsys Inc

Jan 2023 - Feb 2025

FPGA Validation Engineer at Intel Corporation

May 2021 - Jan 2023

Graduate Technical Intern at Intel Corporation

Jun 2020 - Dec 2020

Education

Master of Science - MS at Northwestern University

Bachelor's degree at Harbin Institute of Technology

none at UC Berkeley Extension

Current Company Information Synopsys Inc

Name: Synopsys Inc

Speciality: EDA, Computer Software, Semiconductor IP, Software Quality, Software Security

Location: Sunnyvale, California, United States

Employees: 10000+

Description: Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP,...

Frequently Asked Questions

How long has Haoxuan Peter been working as a Staff ASIC/FPGA Engineer?

Haoxuan Peter's total experience in various companies as a Staff ASIC/FPGA Engineer 6 months.

What is Haoxuan Peter's minimum period of employment in the companies?

Haoxuan Peter's minimum period of employment in various companies is 6 months.

What is Haoxuan Peter's average duration of employment for different companies?

On average, Haoxuan Peter works for one company for 1 year 5 months

What industries has Haoxuan Peter worked in?

Haoxuan Peter works in the Computer Software. Previously, Haoxuan Peter worked in the Semiconductors.

What positions has Haoxuan Peter held before?

Previously, Haoxuan Peter worked as a ASIC Digital Design Engineer, and FPGA Validation Engineer, and Graduate Technical Intern.

How do I contact Haoxuan Peter?

Haoxuan Peter's email address is h**********r@synopsys.com, phone number is +1-***-***-3651. Sign up to get contact details.

Who is the Co-CEO of the Synopsys Inc?

The Co-CEO of the Synopsys Inc is Aart de Geus
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