Edwin Yew: Email & Phone Number

Work Experience 25 years

Sr Director PD - AI Silicon Engineering at Microsoft

Mar 2026 - Current

Principal Director - AI Silicon Engineering at Microsoft

Oct 2024 - Mar 2026

Director of GPU Physical Design Engineering (STA Timing, Quality, Extraction and EM/IR) at Intel

Apr 2020 - Oct 2024

GPU STA Timing, Quality and Extraction Engineering Manager at Intel

Jul 2014 - Apr 2020

Staff Graphics Hardware STA Timing Engineer at Intel

Mar 2009 - Jul 2014

Principal STA Timing Engineer at ZiiLABS

Oct 2007 - Feb 2009

Senior ASIC Design Engineer at Intel

Dec 2001 - Oct 2007

Edwin is proficient in Cantonese, Chinese, and English. Their professional focus is Application-Specific Integrated Circuits (ASIC), ASIC, and Debugging across 3 core areas.

Edwin holds Open Water Diver certifications and has been awarded High Quality Partition Boundary Timing Modeling For Hierarchical Based Design (1st Place - Best Paper)