Current Position:
Senior Design Verification Engineer at Cirrus LogicExperience:
9 yearsLocation:
Austin, Texas Metropolitan AreaApr 2023 - Current
Jun 2020 - Apr 2023
May 2019 - Dec 2019
Mar 2016 - Jan 2017
Master of Science - MS at The University of Texas at Austin
Bachelor of Engineering - BE at University of Electronic Science and Technology of China
Bachelor of Engineering - BE at University of Glasgow
高中学历 at 浙江省瓯海中学
温州绣山中学
How long has Di Cheng been working as a Senior Design Verification Engineer?
Di Cheng's total experience in various companies as a Senior Design Verification Engineer 2 years 4 months.What is Di Cheng's minimum period of employment in the companies?
Di Cheng's minimum period of employment in various companies is 7 months.What is Di Cheng's average duration of employment for different companies?
On average, Di Cheng works for one company for 1 year 5 monthsWhat industries has Di Cheng worked in?
Di Cheng works in the Semiconductors.What positions has Di Cheng held before?
Previously, Di Cheng worked as a Design Verification Engineer, and Verification Engineer Intern, and Research Assistant.How do I contact Di Cheng?
Di Cheng's email address is c*****d@cirrus.com, phone number is +1-909-***-**60. Sign up to get contact details.Who is the President & CEO of the Cirrus Logic?
The President & CEO of the Cirrus Logic is John ForsythWho are Di Cheng's peers at other companies?
Di Cheng's peers at other companies are Tim Noh and Swati Nerlekar and Eric PanganibanFind email for 850M+ professionals