Position:
ASIC Design Engineer at Western Semiconductor
Location:
Tempe, Arizona, United States
Found email addresses for Devashish Gawde:
Found phone for Devashish Gawde:
May 2025 - Current
Jul 2023 - May 2024
Sep 2023 - Feb 2024
Jul 2021 - Feb 2022
Their professional focus is Advanced Verilog, Analog Circuit Design, and Application-Specific Integrated Circuits (ASIC) across 3 core areas.
Devashish holds Allegro X PCB Editor & System Capture, RTL to GDS-II, and Static Timing Analysis certifications.
Master of Science - MS at New York University
Bachelor's degree at St. Francis Institute Of Technology
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