Daniel Kaganovsky

Daniel Kaganovsky: Email & Phone Number

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Senior Defect Reduction/Yield Development Engineer at Intel|Gedera, Center District, Israel

Position:

Senior Defect Reduction/Yield Development Engineer at Intel

Location:

Gedera, Center District, Israel

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Last updated: 2026-06-09
Updated: 2026-06-09

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Work Experience 16 years

Senior Defect Reduction/Yield Development Engineer at Intel

Jan 2024 - Current

Metrology Operations Manager at Intel

Aug 2019 - Jan 2024

Defect Reduction Sr. Process Engineer at Intel

Jan 2013 - Aug 2019

Silicon Photonics Integration Engineer at Micron Technology

Jan 2012 - Jan 2013

Defect Metrology Engineer at Micron Technology

May 2010 - Jan 2012

Daniel Kaganovsky started working in 2010, then the employee has changed 1 company and 4 jobs. On average, Daniel Kaganovsky works for one company for 3 years 3 months.

Their professional focus is Data Analysis, Leadership, and Problem Solving across 3 core areas.

Education

Master of Engineering - MEng at Tel Aviv University

Bachelor of Engineering - BE at Ben-Gurion University of the Negev

Frequently Asked Questions

SignalHire found a verified business email address for Daniel Kaganovsky: d***************y@intel.com.
SignalHire found a verified phone number for Daniel Kaganovsky: +972-***-***-7817.
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Daniel Kaganovsky has 16 years of professional experience. They have held roles including Metrology Operations Manager, Defect Reduction Sr. Process Engineer, and Silicon Photonics Integration Engineer at companies such as Intel, Intel, and Micron Technology. Their education includes Master of Engineering - MEng from Tel Aviv University, and Bachelor of Engineering - BE from Ben-Gurion University of the Negev.
Yes. Daniel Kaganovsky's SignalHire profile was last updated on 9 June 2026, reflecting their current position as Senior Defect Reduction/Yield Development Engineer at Intel in Santa Clara, California, United States.

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