Atria Logic Inc. Email Formats
Get Verified Emails For Atria Logic Inc.
Contact top employees from
Atria Logic Inc.
- Atria Logic Inc. uses 6 formats total. Most emails use firstNameInitiallastName: jdoe@atrialogic.com. This shows up in about 52% of work addresses.
- Other common patterns:
- firstName.lastName → jane.doe@atrialogic.com
- lastName_firstName → doe_jane@atrialogic.com
Popular Atria Logic Inc.'s Email Templates
| Atria Logic Inc. ’s Employees Email Address Formats | Percentage | |
|---|---|---|
Employees Email Address Formats firstNameInitiallastName |  jdoe@atrialogic.com | Percentage: 52% |
Employees Email Address Formats lastName_firstName | doe_jane@atrialogic.com | Percentage: 43% |
Employees Email Address Formats firstName.lastName | jane.doe@atrialogic.com | Percentage: 2% |
Employees Email Address Formats lastNameInitial_firstNameInitial | d_j@atrialogic.com | Percentage: 1% |
Employees Email Address Formats lastNameInitial-firstName | d-jane@atrialogic.com | Percentage: 1% |
Employees Email Address Formats firstNameInitial-lastNameInitial | j-d@atrialogic.com | Percentage: 1% |
Contact top employees from
Atria Logic Inc.
Manish Yadav
Verification Engineer
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Verification Engineer
MOHAMMED ZUBER NALABAND
Senior Verification Engineer
Rajiv Singh
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srinivasarao gali
Application Specific Integrated Circuit Engineer
Purnima Sarkar
Engineer
Jaish Chandra
RTL Design Engineer
Payal Nale
Design Verification Engineer
Buddhadeb Basak
Verification Engineer
Srinivasu Chitikina
Verification Engineer
Bala Murugan
Verification Engineer
sai Nilesh
Verification Engineer
Sushil Kumar Bhardwaj
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Shyam Bhimaraju
Design Verification Engineer
Shaik Reshma
Marketing engineer+HR
Nikhil kumar Yedde
Design Verification Engineer
VENKATA MAHESH REDDY THAMMINENI
Verification Engineer
Dushyant kumar Sinha
Design Verification Engineer
MD NADEEM HUSSAIN
Verification Engineer
Rakesh Kumar Mahato
Design Verification Engineer
PICHHAPATI VISHNU VARDHAN REDDY
Design Verification Engineer
Kokkirapalle Maheswar Reddy
Verification Engineer
Tata Praveen
FPGA Engineer
Akash Mishra
Design Verification Engineer
MD Rehan Ansari
Design and Verification Engineer
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