3ST Technologies Email Formats
Contact top employees from
3ST Technologies
- 3ST Technologies uses 6 formats total. Most emails use firstName.lastNameInitial: jane.d@3sttechnologies.com. This shows up in about 56% of work addresses.
- Other common patterns:
- firstNamelastName → janedoe@3sttechnologies.com
- lastNameInitial_firstNameInitial → d_j@3sttechnologies.com
Popular 3ST Technologies's Email Templates
| 3ST Technologies ’s Employees Email Address Formats | Percentage | |
|---|---|---|
Employees Email Address Formats firstName.lastNameInitial |  jane.d@3sttechnologies.com | Percentage: 56% |
Employees Email Address Formats lastNameInitial_firstNameInitial | d_j@3sttechnologies.com | Percentage: 16% |
Employees Email Address Formats firstNamelastName | janedoe@3sttechnologies.com | Percentage: 11% |
Employees Email Address Formats firstNamelastNameInitial | janed@3sttechnologies.com | Percentage: 9% |
Employees Email Address Formats lastNameInitial-firstNameInitial | d-j@3sttechnologies.com | Percentage: 6% |
Employees Email Address Formats firstNameInitial.lastName | j.doe@3sttechnologies.com | Percentage: 2% |
Contact top employees from
3ST Technologies
Suraj Negi
Internship Trainee
Ranbir Singh
Intern
swati singh
Trainee
Sandeep Gupta
Founder & CMD
Amrita Kumari
Intern
prithiviraj kumaravel
Assistant Manager
Namit Jain
Design Verification Engineer
Amrit Singh Ittan
Trainee, VLSI Design
Pranava Hegde
Design Verification
Gopal Sharma
Design Verification Engineer
Pawan Goswami
Associative Design and verification engineer
Dhruv Sachdeva
ASIC Verification Trainee
Gopal Das Sharma
Service Manager
Vishnu Vardhan
Advanced VLSI desgin and verification trainee
Manjunadha Yechuri
Trainee
Uday Kumar
Trainee
Aayush Tiwari
Internship Trainee
Boddu Alekhya
Application Specific Integrated Circuit Engineer
ROHIT SINGH
Design and verification trainee
Ram Kishan
Trainee
Prakash Jha
VLSI Trainee | Chip Design & Verification Enthusiast
Ashish jangra
VLSI Design & Verification Engineer Trainee
Emarishi Kataria
Design and Verification
DEEPTHI SREE NEELAM
Trainee
Yash Choudhary
VLSI Traniee | Chip Design & Verification Enthusiast
Keshav Sharma
Digital design and verification trainee
Kunal Gupta
Digital Design and Verification Trainee
Kartikay Sharma
Project Intern
