TK BEH

TK BEH: Email & Phone Number

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SOC Subsystem Design Engineer at Startup Awards|Bayan Lepas, Penang, Malaysia

Position:

SOC Subsystem Design Engineer at Startup Awards

Location:

Bayan Lepas, Penang, Malaysia

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Last updated: 2026-08-18
Updated: 2026-08-18

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Work Experience 27 years

SOC Subsystem Design Engineer at Startup Awards

Jan 1999 - Current

FPGA Design Engineer at Altera

Jan 2015 - Jan 2017

FPGA Design Engineer at Altera

Jan 2013 - Jan 2015

CPU Component Design Engineer at Intel

Jan 2003 - Jan 2012

Design Engineer at AMD/SPANSION

Jan 2000 - Jan 2003

R&D Engineer at DYNACRAFT

Jan 1999 - Jan 2000

TK BEH started working in 1999, then the employee has changed 4 companies and 4 jobs. On average, TK BEH works for one company for 7 years 5 months.

Their professional focus is Circuit, Circuit Design, and CMOS across 3 core areas.

Education

Bachelor of Applied Science - BASc at University of Malaya

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