Position:
Senior Design Verification Engineer SoC/ASIC/FPGA at Synopsys Inc
Location:
United States
Found email addresses for Tejeswi:
Found phone for Tejeswi:
Sep 2023 - Current
Apr 2020 - Dec 2021
Apr 2018 - Mar 2020
Their professional focus is Automation & Scripting, Collaboration & Problem Solving, and Debug & Collaboration across 3 core areas.
Master's degree at University of Houston
Bachelor of Technology - BTech at G. Narayanamma Institute Of Technology And Science
What is Tejeswi's email address?
SignalHire found a verified business email address for Tejeswi: t*****i@synopsys.com.What is Tejeswi's phone number?
SignalHire found a verified phone number for Tejeswi: +1-***-***-1664.How do I contact Tejeswi at Synopsys Inc?
You can reach Tejeswi through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.What is Tejeswi's professional background?
Tejeswi has 8 years of professional experience. They have held roles including Design Verification Engineer SoC/ASIC/FPGA, and Design Verification Engineer at companies such as QUALCOMM TECHNOLOGIES INTERNATIONAL, LTD., and L&T Technology Services. Their education includes Master's degree from University of Houston, and Bachelor of Technology - BTech from G. Narayanamma Institute Of Technology And Science.Is Tejeswi's contact information up to date?
Yes. Tejeswi's SignalHire profile was last updated on 5 December 2025, reflecting their current position as Senior Design Verification Engineer SoC/ASIC/FPGA at Synopsys Inc in Sunnyvale, California, United States.SignalHire complies with the General Data Protection Regulation (GDPR). SignalHire follows GDPR requirements, including but not limited to rights of data subjects to access, correct, or delete their personal information and supports the right to be forgotten.
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