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Senior RTL Design Engineer at VVDN Technologies|Aluva, Kerala, India

Position:

Senior RTL Design Engineer at VVDN Technologies

Location:

Aluva, Kerala, India

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Last updated: 2026-04-05
Updated: 2026-04-05

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Work Experience 7 years

Senior RTL Design Engineer at VVDN Technologies

Apr 2022 - Current

FPGA design Engineer at VVDN Technologies

Jul 2019 - Apr 2022

FPGA Engineer at VVDN Technologies

Jan 2019 - Jun 2019

Shincy started working in 2019, then the employee has changed 2 jobs. On average, Shincy works for one company for 2 years 5 months.

Education

Master of Technology - MTech at Mar Athanasius College of Engineering

Frequently Asked Questions

What is Shincy's minimum period of employment in the companies?

Shincy's minimum period of employment in various companies is 5 months.

What is Shincy's average duration of employment for different companies?

On average, Shincy works for one company for 1 year 7 months

What industries has Shincy worked in?

Shincy works in the Information Technology and Services.

What positions has Shincy held before?

Previously, Shincy worked as a FPGA design Engineer, and FPGA Engineer.

How do I contact Shincy?

Shincy's phone number is +91-***-***-7272. Sign up to get contact details.

Who is the CEO of the VVDN Technologies?

The CEO of the VVDN Technologies is Puneet Agarwal

Who are Shincy's peers at other companies?

Shincy's peers at other companies are ARYA KRISHNAN and Prasoon and Yaswanth Raman Ravada

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