s devaki: Email & Phone Number
Opt-OutPosition:
Trinee Design Verification Engineer at VLSIGuru Training Institute
Location:
Hyderabad, Telangana, India
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Education
Bachelor of Technology - BTech at NBKR Institute of Science and Technology
Diploma at Sv Govt polytechnic
ZP HIGH SCHOOL
Skills
QuestaSim, Universal Verification Methodology (UVM), SystemVerilog, Model sim, EDA, VerilogOther employees at VLSIGuru Training Institute
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