saikumar Bommina

saikumar Bommina: Email & Phone Number

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Physical Design Engineer at Intel|Krishna, Andhra Pradesh, India

Position:

Physical Design Engineer at Intel

Location:

Krishna, Andhra Pradesh, India

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Last updated: 2026-01-31
Updated: 2026-01-31

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Work Experience 7 years

Physical Design Engineer at Intel

Apr 2024 - Current

ASIC Physical Design Engineer at Siliconus Technologies Pvt Ltd

Apr 2019 - Apr 2024

saikumar Bommina started working in 2019, then the employee has changed 1 company and 1 job. On average, saikumar Bommina works for one company for 3 years 7 months.

Their professional focus is Application-Specific Integrated Circuits (ASIC), BASIC ELECTRONIS, and C (Programming Language) across 3 core areas.

Education

Bachelor of Technology - BTech at Lakireddy Bali Reddy College of Engineering, L.B. Reddy Nagar, Mylavaram, PIN-521230(CC-76)

Diploma at AANM&VVRSR POLYTECHNIC

SSC at Z.P.H school vissanapeta

Frequently Asked Questions

What is saikumar Bommina's email address?

SignalHire found a verified business email address for saikumar Bommina: b*************r@intel.com.

What is saikumar Bommina's phone number?

SignalHire found a verified phone number for saikumar Bommina: +91-***-***-6896.

How do I contact saikumar Bommina at Intel?

You can reach saikumar Bommina through SignalHire by unlocking their verified email and direct phone number (free signup, no credit card needed). SignalHire is the fastest route if you need their contact details immediately.

What is saikumar Bommina's professional background?

saikumar Bommina has 7 years of professional experience. They have held roles including ASIC Physical Design Engineer at companies such as Siliconus Technologies Pvt Ltd. Their education includes Bachelor of Technology - BTech from Lakireddy Bali Reddy College of Engineering, L.B. Reddy Nagar, Mylavaram, PIN-521230(CC-76), and Diploma from AANM&VVRSR POLYTECHNIC.

Is saikumar Bommina's contact information up to date?

Yes. saikumar Bommina's SignalHire profile was last updated on 31 January 2026, reflecting their current position as Physical Design Engineer at Intel in Santa Clara, California, United States.

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