Position:
Physical Design Engineer at Astera Labs
Location:
United States
Found email addresses for Sai baba Devisetty:
Found phone for Sai baba Devisetty:
Feb 2025 - Current
Jul 2023 - Jun 2024
Mar 2021 - Jun 2023
Their professional focus is Application-Specific Integrated Circuits (ASIC), Cadence Innovus, and Cadence Tempus across 3 core areas.
Master's Degree at Southern Illinois University, Carbondale
Bachelor of Engineering at KL University
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