Position:
RTL AND FPGA ENGINEER at Research Centre Imarat (RCI)•DRDO
Location:
Kurnool, Andhra Pradesh, India
Found email addresses for Jeevan Sai:
Found phone for Jeevan Sai:
Mar 2025 - Current
May 2024 - Mar 2025
Their professional focus is Field-Programmable Gate Arrays (FPGA), RTL Design, and Very-Large-Scale Integration (VLSI) across 3 core areas.
Jeevan holds Pearson MePro Level 10 Expert certifications.
B-TECH at G. Pulla Reddy Engineering College
SignalHire complies with the General Data Protection Regulation (GDPR). SignalHire follows GDPR requirements, including but not limited to rights of data subjects to access, correct, or delete their personal information and supports the right to be forgotten.
SignalHire is CCPA-compliant and provides California residents the right to know, access, opt out, and request deletion of their personal data.