Jahnavi: Email & Phone Number
Opt-OutPosition:
Design Verification Engineer at Semicon Chip
Location:
Bengaluru, Karnataka, India
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Apr 2026 - Current
Oct 2024 - Nov 2025
May 2021 - Aug 2024
Sep 2023 - Oct 2023
Jahnavi is proficient in English and Kannada. Their professional focus is AXI, Cadence Schematic Capture, and Cadence Virtuoso Layout Editor across 3 core areas.
Education
B.E at Dr. Ambedkar Institute Of Technology
PUC at Chitrakoota PU college
SSLC at Dodda Aaladamara High school
Tesco Bengaluru
Bachelor of Engineering at Dr. Ambedkar Institute of Technology
Chitrakoota School
VLSIGuru Training Institute
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